How to Reduce Junction Temperature in MOSFETs and IGBTs

Junction temperature (Tj) is the temperature at the semiconductor die where current flows and power is dissipated. It directly affects:

Performance:

• On-resistance (RDS(on)) increases ~0.4%/°C for MOSFETs
• Switching losses increase with temperature
• Safe Operating Area (SOA) shrinks at higher Tj

Reliability:

• Every 10°C reduction approximately doubles lifetime
• Thermal cycling range determines wire bond fatigue
• High Tj accelerates die attach degradation

The Thermal Path:

Tj = Ta + P × (Rth_jc + Rth_cs + Rth_sa)

Where:

• Ta = Ambient temperature
• P = Power dissipation
• Rth_jc = Junction-to-case thermal resistance
• Rth_cs = Case-to-sink (interface) thermal resistance
• Rth_sa = Sink-to-ambient thermal resistance

Calculating Required Thermal Resistance:

Working backwards from maximum Tj: Rth_total = (Tj_max - Ta_max) / P_max

Example:

• Tj_max = 150°C (derated to 125°C for reliability)
• Ta_max = 50°C
• P_max = 100W

Rth_total = (125 - 50) / 100 = 0.75°C/W

This total must be divided among junction-case, interface, and heatsink.

Package choice fundamentally limits achievable Rth_jc. Selecting the right package is the first step in thermal optimization.

Common Package Thermal Resistances:

TO-220: 0.5-1.5°C/W TO-247: 0.3-0.7°C/W TO-263 (D2PAK): 1-3°C/W TO-252 (DPAK): 3-8°C/W SOT-223: 40-60°C/W QFN: 2-10°C/W (varies widely)

Power Module Advantages:

For high-power applications (>100W per switch), power modules offer:

• Lower Rth_jc (0.05-0.2°C/W)
• Baseplate for direct heatsink mounting
• Integrated gate drivers (some)
• Parallel die for current sharing

Popular module formats:

• Econopack (standard industrial)
• SEMIKRON/Infineon modules
• Semisouth/CREE SiC modules

Package Selection Guidelines:

< 50W per device: → Discrete packages (TO-247, TO-220) → Good airflow around package

50-300W per device: → High-power discretes (TO-264, SOT-227) → Or small power modules

300W per device: → Power modules required → Consider liquid cooling

Advanced Packages:

Double-Sided Cooling:

• Removes heat from both sides of die
• Can halve effective Rth_jc
• Requires specialized heatsink design

Embedded Die:

• Die embedded in PCB substrate
• Direct thermal path through board
• Good for high-density designs

Direct Bonded Copper (DBC):

• Die mounted on ceramic substrate with copper
• Excellent thermal and electrical isolation
• Standard for high-power modules

The most effective way to reduce Tj is to reduce power dissipation. Even small reductions compound across the thermal stack.

Conduction Losses:

P_cond = I²RMS × RDS(on) (MOSFETs) P_cond = I_avg × VCE(sat) (IGBTs)

Reduction strategies:

1. Use lower RDS(on) devices (often larger die)
2. Parallel multiple devices
3. Reduce current through circuit design
4. Select SiC MOSFETs (lower RDS(on) at temp)

Switching Losses:

P_sw = 0.5 × V × I × (t_rise + t_fall) × f_sw

Reduction strategies:

1. Reduce switching frequency (if ripple permits)
2. Use faster devices (SiC, GaN)
3. Implement soft switching (ZVS, ZCS)
4. Optimize gate drive (faster, but watch EMI)

Gate Drive Losses:

P_gate = Qg × Vgs × f_sw

Often small compared to switching losses, but matters at high frequency.

Trade-offs:

Lower RDS(on) → Higher capacitance → Higher switching losses Faster switching → Lower losses → Higher EMI

Finding the optimum requires system-level analysis.

SiC vs Silicon:

SiC MOSFETs offer:

• Lower RDS(on) per die area
• RDS(on) increases less with temperature
• Higher switching speed capability
• Higher operating temperature (175°C+)

Consider SiC when:

• Operating at high temperature
• High switching frequency (>50kHz)
• Efficiency is paramount
• Premium cost is acceptable

With package and power determined, heatsink design must provide sufficient Rth_sa.

Natural Convection Heatsinks:

Typical Rth_sa: 1-10°C/W depending on size

Optimization parameters:

• Fin height: Taller = better (diminishing returns above 50mm)
• Fin spacing: 6-10mm for natural convection
• Fin thickness: 1-2mm typical
• Base thickness: Thicker spreads heat better

Rules of thumb:

• Rth ∝ 1/√(Surface area)
• Vertical orientation 15-20% better than horizontal
• Black anodize improves radiation by 20-30%

Forced Air Heatsinks:

Typical Rth_sa: 0.1-1°C/W

Optimization parameters:

• Airflow velocity: Higher = better (watch pressure drop)
• Fin spacing: 1.5-3mm for forced air
• Fin aspect ratio: Height/spacing = 10-20 typical
• Bypass: Prevent air from going around heatsink

Performance scaling:

• Rth ∝ 1/velocity^0.5 to 0.8
• Doubling airflow cuts Rth by ~30-40%

Liquid Cooling:

Typical Rth_sa: 0.01-0.1°C/W (effectively Rth_sc for cold plate)

When to use:

• Power density > 50W/cm²
• Ambient > 40°C
• Multiple devices in close proximity
• Enclosure is sealed

Cold plate design parameters:

• Channel geometry (parallel, serpentine, pin-fin)
• Coolant flow rate
• Coolant type (water, water-glycol, dielectric)
• Inlet/outlet locations

Heatsink Material Selection:

Aluminum (6063-T5):

• k = 200 W/mK
• Density: 2.7 g/cm³
• Cost-effective, easy to extrude

Copper:

• k = 390 W/mK
• Density: 8.9 g/cm³
• 2× thermal performance, 3× weight, 3× cost

Hybrid:

• Copper base for spreading
• Aluminum fins for surface area
• Best of both worlds

The case-to-sink interface often limits thermal performance. Proper TIM selection and application are critical.

Interface Thermal Resistance:

Rth_cs = t / (k × A) + Rcontact

Where:

• t = TIM thickness
• k = TIM thermal conductivity
• A = Contact area
• Rcontact = Surface contact resistance

Minimizing Rth_cs:

1. Reduce bond line thickness:

   • Use machined surfaces (Ra < 1.6μm)
   • Apply appropriate mounting pressure
   • Consider phase change materials

2. Increase effective conductivity:

   • Select higher-k TIM
   • But diminishing returns above 5-10 W/mK
   • Contact resistance often dominates

3. Increase contact area:

   • Ensure full footprint contact
   • Avoid warped heatsink surfaces
   • Use compliant TIMs for imperfect surfaces

Typical Interface Values:

Thermal grease (3 W/mK, 50μm): 0.02-0.05°C/W per cm² Gap pad (3 W/mK, 0.5mm): 0.15-0.25°C/W per cm² Phase change (2 W/mK, 75μm): 0.03-0.08°C/W per cm²

Mounting Pressure:

Most TIMs require 50-200 psi for optimal performance. Use:

• Calibrated torque on fasteners
• Spring washers for consistent preload
• Belleville washers for high force in small space

Interface Area Considerations:

Larger package → More interface area → Lower Rth_cs But: Package footprint may not equal thermal footprint

For modules with multiple die:

• Consider die locations within package
• Account for spreading resistance
• TIM must cover all die locations

Beyond component-level optimization, system design significantly impacts junction temperatures.

Enclosure Airflow:

• Position inlet vents low, outlet high (natural convection)
• Avoid recirculation of exhaust air
• Separate hot and cold zones
• Provide adequate clearance around heatsinks

Component Placement:

• Hottest components near exhaust
• Temperature-sensitive components upstream
• Maintain minimum spacing between heat sources
• Consider thermal coupling between devices

Ambient Temperature Management:

Every 1°C ambient reduction = 1°C Tj reduction

Strategies:

• Locate equipment in shaded areas
• Use light-colored enclosures
• Provide enclosure ventilation
• Consider active cooling of enclosure

Power Derating:

Operating at reduced power reduces Tj:

• At 80% load, losses reduce ~35%
• Significant lifetime improvement
• Consider oversizing power stage

Thermal Transients:

For pulsed loads, thermal mass matters:

Zth = f(pulse width, duty cycle)

Short pulses (<100ms) use much lower effective Rth Allows higher peak power than DC capability

Monitoring and Protection:

• Use NTC thermistors on heatsink
• Implement thermal shutdown
• Consider on-die temperature sensing
• Log temperatures for predictive maintenance

Design Margin:

Always design with margin:

• Target Tj < 80% of Tj_max
• Account for manufacturing variation (±20% Rth)
• Consider end-of-life thermal degradation
• Allow for ambient temperature extremes